# This involves creating a BOOT.BIN using your bitstream, then splitting it up again into its constituent binaries. # You cannot cat the bitstream directly - Xilinx's xdevcfg driver expects the bitfile to be modified in a special way. We don't need to care about this for lab 1. I'm not an expert though, correct me if I'm wrong. The boot hangs if the kernel cannot probe the device. It is not possible to boot up the board with a devicetree that is inconsistent with the bitstream.įor instance: If the device tree has an entry describing an AXIDMA hardware at a physical address, that hardware better be present during boot time. This means that FPGA IP (like DMA), if listed on the devicetree, must be consistent with the bitstream in BOOT.BIN. Hence, it is imperative that the device tree matches the hardware found on the board. Linux uses this information to associate drivers to hardware during boot up. NOTE: DTB files are built from device tree source ( dts ) files, which are textual descriptions of hardware found on the board along with address maps. We have to change this for lab 2 & 3 to add the DMA engineĬp arch/arm/boot/dts/zynq-zed.dtb $WD/boot/devicetree.dtb Make zynq-zed.dtb # Use Xilinx default device tree for lab 1. # More meaningful comment on what the change does, and why it is required # Change the "bootargs" initialization to the following in zynq-zed.dts, using the patch and instructions below:
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